Optimization of CMOS Miller OTA using Differential Evolutionary Algorithm

Abstract

The circuit parameters of CMOS based analog and mixed-signal circuits conventionally are achieved by skilled engineers. Due to the progress of Moore’s assumption and the growing complication of physical MOSFET models, the attention towards automation of CMOS based analog circuit design is increased. The issue of the automatic design of analog circuit has been tracked in the academy and industry since more than last two decades. In this paper, application of differential evolution (DE) algorithm is presented for the optimization of CMOS Miller Operational Transconductance Amplifier (OTA). DE algorithm has been developed using C language to optimize the CMOS Miller OTA. The error function of optimization for this circuit depends on desired specifications like voltage gain, phase margin (PM), unit gain bandwidth (UGB), power consumption, common mode rejection ratio (CMRR), slew rate (SR), power supply rejection ratio (PSRR), and a total MOS transistor area. Ngspice circuit simulator has been used as an error function creator and evaluator. BSIM3v3 MOSFET models with 0.18 µm and 0.35 µm CMOS technology have been used to simulate this circuit. The simulation results of this work are presented and compared with previous works reported in the literature

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Published
2019-03-20
How to Cite
[1]
P. Prajapati, K. Acharya, and M. Shah, “Optimization of CMOS Miller OTA using Differential Evolutionary Algorithm”, IJISAE, vol. 7, no. 1, pp. 47-51, Mar. 2019.
Section
Research Article