CHIWANDE, S. S. .; DAKHOLE, P. K. . Ultra Efficient Reversible Logic Multiplier Design and Implementation for Low Power Application. International Journal of Intelligent Systems and Applications in Engineering, [S. l.], v. 12, n. 10s, p. 415–422, 2024. Disponível em: https://ijisae.org/index.php/IJISAE/article/view/4390. Acesso em: 22 jul. 2024.