KUMAR C., A. .; G. R., P. .; G. R., P. .; R., A. .; B. P., P. K. .; S., H. .; VAISHNAVI D. A., L. . Implementation of an Efficient and Reconfigurable Architecture for DCT on FPGA. International Journal of Intelligent Systems and Applications in Engineering, [S. l.], v. 12, n. 10s, p. 597–604, 2024. Disponível em: https://ijisae.org/index.php/IJISAE/article/view/4412. Acesso em: 22 jul. 2024.