RAGHUNATH B. H.; ARAVIND H. S. An Efficient FPGA-Based Dynamic Partial Reconfigurable Implementation. International Journal of Intelligent Systems and Applications in Engineering, [S. l.], v. 11, n. 1s, p. 183–192, 2023. Disponível em: https://ijisae.org/index.php/IJISAE/article/view/2471. Acesso em: 2 may. 2024.