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L. S. R, K. B. N. Efficient Design of Configurable Logic Block with Customized LUT using Reversible Fault Tolerant Gates. Int J Intell Syst Appl Eng [Internet]. 2024 Feb. 23 [cited 2024 Jul. 22];12(16s):217-26. Available from: https://ijisae.org/index.php/IJISAE/article/view/4810