Naddunoori M, M. D. Design of an Error Detection Fault Tolerant Arbiter for a Network on Chip. Int J Intell Syst Appl Eng [Internet]. 2024 Mar. 24 [cited 2024 Jul. 22];12(18s):670-81. Available from: https://ijisae.org/index.php/IJISAE/article/view/5022