Pankaj P. Prajapati. Sizing of Dual-Stage Operational Amplifiers through PVT-Aware Circuit Optimization in 0.18μm CMOS Technology. Int J Intell Syst Appl Eng [Internet]. 2024 Jul. 3 [cited 2024 Jul. 8];12(4):1148-55. Available from: https://ijisae.org/index.php/IJISAE/article/view/6360