1.
S D, K. S VG, Johnsi J J, S B. Design an Efficient Braun Multiplier Using KSA Based CMOS Logics. Int J Intell Syst Appl Eng [Internet]. 2022 Oct. 1 [cited 2024 Mar. 28];10(3):423–429. Available from: https://ijisae.org/index.php/IJISAE/article/view/2183