Artificial Neural Network-Based 4-D Hyper-Chaotic System on Field Programmable Gate Array

Ismail Koyuncu; Murat Alcin; Pakize Erdogmus; Murat Tuna

doi:10.18201/ijisae.2020261591

Authors

Ismail Koyuncu Afyon Kocatepe University https://orcid.org/0000-0003-4725-4879
Murat Alcin Afyon Kocatepe University https://orcid.org/0000-0002-2874-7048
Pakize Erdogmus Duzce University https://orcid.org/0000-0003-2172-5767
Murat Tuna Kırklareli University https://orcid.org/0000-0003-3511-1336

DOI:

https://doi.org/10.18201/ijisae.2020261591

Keywords:

Chaos, 4-D Chaotic System, ANN, Field Programmable Gate Array, VHDL

Abstract

In this presented study, a 4-D hyper-chaotic system newly proposed to the literature, has been implemented as Multi-Layer Feed-Forward Artificial Neural Network-based on FPGA chip with 32-bit IEEE-754-1985 floating-point number standard to be utilized in real time chaos-based applications. In the first step of the study, 4-D hyper-chaotic system has been numerically modeled on FPGA using Dormand-Prince numeric algorithm. In the second step, the data set (4X10,000) obtained from Matlab-based numeric model has been divided into two parts as training data set (4X8,000) and test data set (4X2,000) to create ANN-based 4-D hyper-chaotic system. A Multi-Layer Feed-Forward ANN structure with 4 inputs and 4 outputs has been constructed for ANN-based 4-D hyper-chaotic system. This structure has only one hidden layer and there are 8 neurons having Tangent Sigmoid activation function used as the activation function in each neuron. 2.58E-07 Mean Square Error (MSE) value has been obtained from the training of ANN-based 4-D hyper-chaotic system. In the third step, after the successful training of ANN-based 4-D hyper-chaotic system, the design of ANN-based 4-D hyper-chaotic system has been carried out on FPGA by taking the bias and weight values of the ANN structure as reference. In this step, at first, Matlab-based Feed-Forward Multi-Layer 4X8X4 network structure has been coded in Very High Speed Integrated Circuit Hardware Description Language (VHDL) to be implemented on FPGA chips. Then, the bias and weight values of the ANN structure has been converted from decimal number system to floating-point number standard and these converted values have been embedded into the network structure. In the last step, the ANN-based 4-D hyper-chaotic system designed on FPGA has been synthesized and tested using Xilinx ISE Design Suite. The chip statistics have been given after the Place&Route process carried out for the Virtex XC6VHX255T-3FF1155 FPGA chip. The maximum operating frequency of ANN-based 4-D hyper-chaotic system on FPGA has been obtained as 240.861 MHZ.

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