Modeling and Performance Analysis of TSV using Nanomaterial-Based Dielectric and Core for High Frequency Applications
Keywords:
3D IC, ETSV, Heat source, Noise coupling, Perylene-N, Through Silicon ViasAbstract
Moore's law has been used to increase Integrated Circuit (IC) efficiency over the last four decades by continuously scaling down device geometries. All across the age of precise scaling, IC's have generally used a planar platform. Two new concerns have emerged in recent years. The fundamental one is that device dimension scalability has nearly reached a snag. The second issue is that connection performance is limiting the overall system's effectiveness. The connectivity latency is nearly equivalent to the device delay, making it the true bottleneck. To meet the system's effectiveness requirements, novel interconnect materials as well as creative structures should be created. New integration methods have been developed to minimize interconnect latency. 3D Integration technology is one of the greatest approaches for CMOS applications because it allows multiple layers of devices to be stacked with high-thickness interconnects between them. Aside from that, 3D IC's ability to achieve heterogeneous integration is a big advantage. Noise coupling is a serious issue in three-dimensional IC. As a result, numerous researchers have developed and evaluated alternative materials throughout TSVs and substrates in order to mitigate noise coupling concerns. Three different methods are envisaged: one is the use of various dielectric materials to reduce electrical signal interference when compared to other dielectric materials; the second is the use of three different models such as ETSV, TTSV and heat source to test electrical signal interference on multiple ICs and finally different core materials are proposed to isolate interference. In comparison to previous strategies, the suggested structures and proposed core and dielectric materials produce better results. Furthermore, this paper presents modeling of the signal TSV which is basically useful for high frequency applications.
Downloads
References
Kihyun Yoon, Gawon Kim, Woojin Lee, Taigon Song, Junho Lee, Hyungdong Lee, Kunwoo Park, and Joungho Kim, “Modeling and Analysis of Coupling between TSVs, Metal, and RDL interconnects in TSV-based 3D IC with Silicon Interposer”. Electronics Packaging Technology Conference, 2009. EPTC.
Joohee Kim, Jonghyun Cho, and Joungho Kim. “TSV Modeling and Noise Coupling in 3D IC”. 3rd Electronics System Integration Technology Conference ESTC Sept. 2010.
Jonghyun Cho, Kihyun Yoon, Jun So Pak, Joohee Kim, Junho Lee, Hyungdong Lee,Kunwoo Park and Joungho Kim, “Guard Ring Effect for Through Silicon Via (TSV)Noise Coupling Reduction”. 2010 IEEE CPMT Symposium Japan Aug. 2010
Jonghyun Cho,Eakhwan Song, Kihyun Yoon, Jun So Pak, Joohee Kim, Woojin Lee, Taigon Song, Kiyeong Kim, Junho Lee, Hyungdong Lee, Kunwoo Park, Seungtaek Yang, Minsuk Suh, Kwangyoo Byun, and Joungho Kim, “Modeling and Analysis of Through-Silicon Via (TSV)Noise Coupling and Suppression Using a Guard Ring”. IEEE Transactions on Components, Packaging and Manufacturing Technology (Volume: 1, Issue: 2 , Feb. 2011)
Vignesh, N.A., Kumar, R., Rajarajan, R., Kanithan, S., Kumar, E.S., Panigrahy, A.K. and Periyasamy, S., 2022. Silicon Wearable Body Area Antenna for Speech-Enhanced IoT and Nanomedical Applications. Journal of Nanomaterials, 2022.
Asisa Kumar Panigrahy, Tamal Ghosh, Siva Rama Krishna Vanjari, and Shiv Govind Singh. "Surface Density Gradient Engineering Precedes Enhanced Diffusion; Drives CMOS In-Line Process Flow Compatible Cu–Cu Thermocompression Bonding at 75° C." IEEE Transactions on Device and Materials Reliability 19, no. 4 (2019): 791-795.
Asisa Kumar Panigrahi, Kuan-Neng Chen. “Low Temperature Cu-Cu Bonding Technology in 3D Integration: An Extensive Review”, Journal of Electronic Packaging 140, no. 1, 010801, 2018.
Panigrahy, A.K., Ghosh, T., Vanjari, S.R.K. and Singh, S.G., 2019. Surface density gradient engineering precedes enhanced diffusion; drives CMOS in-line process flow compatible cu–cu thermo compression bonding at 75° C. IEEE Transactions on Device and Materials Reliability, 19(4), pp.791-795.
S.Kanithan, N.ArunVignesh, E.Karthikeyan and N.Kumaresan “An intelligent energy efficient cooperative MIMO-AF multi-hop and relay based communications for Unmanned Aerial Vehicular networks”, Journal of Computer Communication, Elsevier, and online published on 21 January 2020. Volume 154, 15 March 2020, Pages 254-261
Patil, S., Panigrahi, A.K., Bonam, S., Kumar, C.H., Singh, O.K. and Singh, S.G., 2016, November. Improved noise coupling performance using optimized Teflon liner with different TSV structures for 3D IC integration. In 2016 IEEE International 3D Systems Integration Conference (3DIC) (pp. 1-4). IEEE.
Pragathi, D., Rakesh, B., Kumar, P.S., Vignesh, N.A., Padma, T. and Panigrahy, A.K., 2020. Noise performance improvement in 3D IC integration utilizing different dielectric materials. Materials Today: Proceedings, 33, pp.3117-3123.
Mohamedyaseen, A., Kumar, P.S., Kavitha, K.R. and Vignesh, N.A., 2022. Anisotropy Enhancing Vertically Aligned Silicon-Germanium Nanowire. Silicon, pp.1-8.
Kanithan, S., Anthoniraj, S., Manikandan, P., Ramaswamy, T., Kumar, R., Vignesh, N.A. and Panigrahy, A.K., 2022. Temperature influence on dielectric tunnel FET characterization and subthreshold characterization. Silicon, pp.1-9.
Narayana, A.L., Prasad, B., Kapula, P.R., Prasad, D., Panigrahy, A.K. and Indira, D.N.V.S.L.S., 2021. Enhancement in performance of DHTprecoding over WHT for EC companded OFDM in wireless networks. Applied Nanoscience, pp.1-16.
Kumar, E. Sathish, Suresh Kumar P, N. Arun Vignesh, and S. Kanithan. "Design and Analysis of Junctionless FinFET with Gaussian Doped for Non-polar Structure." Silicon (2022), pp1-9.
Nandhini, S., Palanivelu, V.R., Panigrahy, A.K., Vignesh, N.A. and Kasirajan, R., 2022. ICT System for 14.0 Adoption: Comparative Study to Assess the Readiness in Manufacturing MSMEs. Journal of Nanomaterials, 2022.
R. Turaka, Bonagiri, K.R., Rao, T.S., Kumar, G.K., Jayabalan, S., Sreenivasulu, V.B., Panigrahy, A.K. and Prakash, M.D., 2022. Design of approximate reverse carry select adder using RCPA. International Journal of Electronics Letters, pp.1-11.
Krsihna, B.V., Gangadhar, A., Ravi, S., Mohan, D., Panigrahy, A.K., Rajeswari, V.R. and Prakash, M.D., 2022. A Highly Sensitive Graphene-based Field Effect Transistor for the Detection of Myoglobin. Silicon, pp.1-8.
Prakash, M.D., Nihal, S.L., Ahmadsaidulu, S., Swain, R. and Panigrahy, A.K., 2022. Design and modelling of highly sensitive glucose biosensor for Lab-on-chip applications. Silicon, pp.1-7.
Prakash, M.D., Nelam, B.G., Ahmadsaidulu, S., Navaneetha, A. and Panigrahy, A.K., 2021. Performance analysis of ion-sensitive field effect transistor with various oxide materials for biomedical applications. Silicon, pp.1-11.
Tammireddy, S.S.P., Samson, M., Reddy, P.R., Reddy, A.K., Panigrahy, A.K., Jayabalan, S. and Prakash, M.D., 2021. An energy-efficient reconfigurable accelerators in multi-core systems using PULP-NN. Applied Nanoscience, pp.1-14.
Panigrahi, A.K., Ghosh, T., Kumar, C.H., Singh, S.G. and Vanjari, S.R.K., 2018. Direct, CMOS in-line process flow compatible, sub 100° C Cu–Cu thermocompression bonding using stress engineering. Electronic Materials Letters, 14(3), pp.328-335.
Panigrahi, A.K., Bonam, S., Ghosh, T., Singh, S.G. and Vanjari, S.R.K., 2016. Ultra-thin Ti passivation mediated breakthrough in high quality Cu-Cu bonding at low temperature and pressure. Materials Letters, 169, pp.269-272.
Panigrahi, A.K., Ghosh, T., Vanjari, S.R.K. and Singh, S.G., 2017. Oxidation resistive, CMOS compatible copper-based alloy ultrathin films as a superior passivation mechanism for achieving 150 C Cu–Cu wafer on wafer thermocompression bonding. IEEE Transactions on Electron Devices, 64(3), pp.1239-1245.
Liang, Y.; Li, Y. Closed-Form Expressions for the Resistance and the Inductance of Different Profiles of Through-Silicon Vias. IEEE Electron Device Lett. 2011, 32, 393–395.
Weerasekera, R.; Grange, M.; Pamunuwa, D.; Tenhunen, H.; Zheng, L.R. Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits. In Proceedings of the 2009 IEEE International Conference on 3D System Integration, San Francisco, CA, USA, 28–30 September 2009.
Jueping, C.; Peng, J.; Lei, Y.; Yue, H.; Zan, L. Through-silicon via (TSV) capacitance modeling for 3D NoC energy consumption estimation. In Proceedings of the 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, China, 1–4 November 2010.
Kim, J.; Pak, J.; Cho, J.; Song, E.; Cho, J.; Kim, H.; Song, T.; Lee, J.; Lee, H.; Park, K.; et al. High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV). IEEE Trans. Compon. Packag. Manuf. Technol. 2011, 1, 181–195.
Savidis, I.; Friedman, E.G. Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance. IEEE Trans. Electron Devices 2009, 56, 1873–1881.
M. Siva Kumar , J. Mohanraj, N. Vinodh Kumar, M. Valliammai 2020. An extensive survey on future direction for the reduction of noise coupling problems in TSV based 3-dimensional IC integration Materials Today: Proceedings 2021., pp.1-10. https://doi.org/10.1016/j.matpr.2020.11.975
Mohan, D. ., & Nair, L. R. . (2023). A Robust Deep Model for Improved Categorization of Legal Documents for Predictive Analytics . International Journal on Recent and Innovation Trends in Computing and Communication, 11(3s), 175–183. https://doi.org/10.17762/ijritcc.v11i3s.6179
Thakre, B., Thakre, R., Timande, S., & Sarangpure, V. (2021). An Efficient Data Mining Based Automated Learning Model to Predict Heart Diseases. Machine Learning Applications in Engineering Education and Management, 1(2), 27–33. Retrieved from http://yashikajournals.com/index.php/mlaeem/article/view/17
Pandey, J. K., Veeraiah, V., Talukdar, S. B., Talukdar, V. B., Rathod, V. M., & Dhabliya, D. (2023). Smart City Approaches Using Machine Learning and the IoT. In Handbook of Research on Data-Driven Mathematical Modeling in Smart Cities (pp. 345–362). IGI Global.
Downloads
Published
How to Cite
Issue
Section
License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
All papers should be submitted electronically. All submitted manuscripts must be original work that is not under submission at another journal or under consideration for publication in another form, such as a monograph or chapter of a book. Authors of submitted papers are obligated not to submit their paper for publication elsewhere until an editorial decision is rendered on their submission. Further, authors of accepted papers are prohibited from publishing the results in other publications that appear before the paper is published in the Journal unless they receive approval for doing so from the Editor-In-Chief.
IJISAE open access articles are licensed under a Creative Commons Attribution-ShareAlike 4.0 International License. This license lets the audience to give appropriate credit, provide a link to the license, and indicate if changes were made and if they remix, transform, or build upon the material, they must distribute contributions under the same license as the original.
