Time Efficient FPGA Overlay for Compute Intensive JPEG Compression Blocks for Real Time Applications

Authors

  • Minal S. Deshmukh School of Electronics and Telecommunication Engineering Dr.Vishwanath Karad MIT WPU, Pune 411038,India
  • P. D. Khandekar Ketan Raut Vishwakarma Institute of Information Technology Pune

Keywords:

FPGA, synthesize, overlay, empowering, programmable, compression

Abstract

OpenCV functions are quite intensive in terms of computations, making them inappropriate for real-time embedded processor-based architectures for the reason that they have a fixed clock frequency and inadequate memory. A primary motivation for using FPGA overlays for the compute-intensive part of JPEG compression is that it can lead to fast compile time and OpenCV functions can be used in embedded systems. This study intends to synthesize the compute-intensive block of the standard JPEG compression algorithm on PYNQ-Z2 (Xilinx’s Python productivity board), which has ZYNQ 7000 SoC-mixed programmable device that integrates a multi-core processor and an FPGA, providing a compelling platform for IoT, AI, and ML applications and the bit stream generated (overlay) is imported into Python as a hardware library. Application developers who are acquainted with software APIs can take advantage of adaptive computing platforms using the hardware library for the fast development of applications without needing to employ ASIC-style design tools to design hardware. This paper presents the role of the overlay by giving a performance comparison of the OpenCV function on processor-based and FPGA platforms in the form of a custom overlay, empowering general-purpose FPGA applications.

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References

Abhishek Kumar Jain, Douglas L. Maskell ,and Suhaib A. Fahmy , Senior Member, IEEE “Coarse Grained FPGA Overlay for Rapid Just-In-Time Accelerator Compilation”, IEEE Transactions on Parallel and Distributed Systems (Volume: 33, Issue: 6, 01 June 2022).

Yunxuan Yu, Chen Wu, Xiao Shi, Lei He, “Overview of a FPGA-Based Overlay Processor”, 2019 China Semiconductor Technology International Conference (CSTIC), Added to IEEE Xplore: 08 July 2019.

Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo Noguera, Kees Vissers, Zhiru Zhang, “High-Level Synthesis for FPGAs: From Prototyping to Deployment”, Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems, Vol. 30, No. 4, April 2011

Vivado Design Suite User Guide, UG910 (v2021.2) October 27, 2021.

Weidong Xiao,Nianbin Wan, Alan Hong, Xiaoyan Chen, “A Fast JPEG Image Compression Algorithm Based on DCT”. 2020 IEEE International Conference on Smart Cloud (SmartCloud), Added to IEEE Xplore: 27 November 2020.

N. Ahmed, T. Natarajan, and K. R. Rao, “Discrete Cosine Transform”, IEEE Trans. Computers, vol. C-23, pp. 90-93, Jan. 1974.

G. K. Wallace, “The JPEG still picture compression standard”, in Communications of the ACM, vol. 34, pp. 31-44, April 1991

Python productivity for Zynq (Pynq) Documentation, Release 2.7, Xilinx, November ,2021.

Accelerating OpenCV Applications with Zynq-7000 All Programmable SoC using Vivado HLS Video Libraries, XAPP1167 (v3.0) April 30, 2015

John C. Russ, F. Brent Neal, “The Image Processing Handbook, 7th Edition”, CRC Press ISBN: 9781498740289, September 2018.

Yahia Said, Taoufik Saidani, Mohamed Atri, “FPGA-based Architectures for Image Processing using High-Level Design”, WSEAS TRANSACTIONS on SIGNAL PROCESSING Volume 11, 2015.

Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo Noguera,Kees Vissers, and Zhiru Zhang, “High-Level Synthesis for FPGAs: From Prototyping to Deployment”, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 30, NO. 4, APRIL 2011.

Dimitris Tsiktsiris, Dimitris Ziouzios, Minas Dasygenis, “A High-Level Synthesis Implementation and Evaluation of an Image Processing Accelerator”, Special Issue "Modern Circuits and Systems Technologies on Electronics 2018"

Brant and G. G. F. Lemieux. ZUMA: an open FPGA overlay architecture. In 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2012, 29 April - 1 May 2012, Toronto, Ontario, Canada.

Muzhir Shaban AL-Ani, Fouad Hammadi Awad, “THE JPEG IMAGE COMPRESSION ALGORITHM”, International Journal of Advances in Engineering & Technology ISSN 2231-1963 2013

María, K., Järvinen, M., Dijk, A. van, Huber, K., & Weber, S. Machine Learning Approaches for Curriculum Design in Engineering Education. Kuwait Journal of Machine Learning, 1(1). Retrieved from http://kuwaitjournals.com/index.php/kjml/article/view/111

Tonk, A., Dhabliya, D., Sheril, S., Abbas, A.H.R., Dilsora, A. Intelligent Robotics: Navigation, Planning, and Human-Robot Interaction (2023) E3S Web of Conferences, 399, art. no. 04044, .

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Published

24.11.2023

How to Cite

Deshmukh , M. S. ., & Khandekar , P. D. . (2023). Time Efficient FPGA Overlay for Compute Intensive JPEG Compression Blocks for Real Time Applications. International Journal of Intelligent Systems and Applications in Engineering, 12(5s), 258–265. Retrieved from https://ijisae.org/index.php/IJISAE/article/view/3883

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Section

Research Article