Impacts of Properties of Dielectric Materials on VIAs in Printed Circuit Boards
Keywords:
PCBs, dielectric materials, insertion loss, return loss and parasitic RLCAbstract
Printed circuit boards, or PCBs, are essential parts of electronic devices because they provide the framework for connecting different electrical parts. Conductive paths called Vertical Interconnect Accesses (VIAs) link the various PCB layers and are essential for maintaining adequate power distribution and signal integrity. The performance and dependability of vias are greatly impacted by the dielectric material selection made for PCBs. The effects of parasitic capacitance, inductance, and impedance on the PCB layout are critical in high-frequency design. This study looks into the frequency domain analysis of VIAS on a PCB made of several types of dielectric materials. By investigating the insertion loss, return loss, and parasitic RLC, the impacts of various materials in the via on the PCB are examined. In this investigation, four dielectric materials are used. Ansys HFSS tool is used to run the simulations..
Downloads
References
T. Huesgen, “Printed circuit board embedded power semiconductors: A technology review,” Power Electronic Devices and Components, vol. 3, 2022.
D. Brooks and J. Adam, PCB Design Guide to Via and Trace Currents and Temperatures, Artech, 2021.
W. Jillek, W. Yung, “Embedded components in printed circuit boards: A processing technology review,” The International Journal of Advanced Manufacturing Technology, 25, pp. 350–360, 2005.
A. Shan and V. R. Prakash, “Certain Investigations on Eye Diagram Observation for Different Frequencies in Printed Circuit Board,” Mobile Computing and Sustainable Informatics. Lecture Notes on Data Engineering and Communications Technologies, vol. 166, 2023. https://doi.org/10.1007/978-981-99-0835-6_44
J. Fan et al., “A. Signal Integrity Design for High-Speed Digital Circuits: Progress and Directions,” IEEE Trans. Electromagn. Compat. 2010, 52, 392–400.
M. Vasa, et al., “Demystifying Via Impedance Optimization for High-Speed Channels,” In Proceedings of the 5th International Conference on ElectroMagnetic Interference and Compatibility (INCEMIC), Bengaluru, India, 13–16 November 2018.
S. Pan and J. Fan, "Equivalent mixed-mode characteristic impedances for differential signal vias," 2009 IEEE International Symposium on Electromagnetic Compatibility, Austin, TX, USA, 2009, pp. 74-79, doi: 10.1109/ISEMC.2009.5284632.
Chang, R. W. Y., See, K. Y., & Chua, E. K. (2007, December). Comprehensive analysis of the impact of via design on high-speed signal integrity. In 2007 9th Electronics Packaging Technology Conference (pp. 262-266). IEEE.
Asif, A. Design of Experiment Methods in High-Speed Signal Via Transition in Printed Circuit Board. Int. J. Eng. Technol. Innov. 13, 2019.
Chang, R. W. Y., See, K. Y., & Chua, E. K. (2007, December). Comprehensive analysis of the impact of via design on high-speed signal integrity. In 2007 9th Electronics Packaging Technology Conference (pp. 262-266). IEEE.
Tortorich, R. P., Morell, W., Reiner, E., Bouillon, W., & Choi, J. W. (2021). A Study on the Radiated Susceptibility of Printed Circuit Boards and the Effects of Via Fencing. Electronics, 10(5), 539.
Wu, Q., Li, Y., Liu, J., & Jiao, Y. (2019, March). High Speed Muti-board Signal Integrity Simulation and Implementation. In 2019 IEEE International Conference on Artificial Intelligence and Computer Applications (ICAICA) (pp. 444-447). IEEE.
Vardapetyan, A., & Ong, C. J. (2020, October). Via design optimization for high-speed differential interconnects on circuit boards. In 2020 IEEE 29th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) (pp. 1-3). IEEE.
Xu, G., Eleftheriades, G. V., & Hum, S. V. (2021). Analysis and design of general printed circuit board metagratings with an equivalent circuit model approach. IEEE Transactions on Antennas and Propagation, 69(8), 4657-4669.
Yoon, Y. C., & Kim, Y. (2021). Unequal Power Dividers Using Uniform Impedance Transmission Lines with Stubs. Journal of Electromagnetic Engineering and Science, 21(1), 44-50.
S. Chen, C. Chen, C. -L. Liao, J. Chen, T. -L. Wu and B. Mutnury, "Via optimization for next generation speeds," 2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), San Jose, CA, USA, 2017, pp. 1-3, doi: 10.1109/EPEPS.2017.8329730.
Yang, Z., Gao, Y., Li, S., Sun, C., & Zhao, Y. (2021, October). Research on Signal Integrity in High-Speed Interconnection Channel Based on SIwave. In 2021 IEEE 3rd International Conference on Circuits and Systems (ICCS) (pp. 78-82). IEEE.
M. Guz, "Practical Considerations for Design and Layout of High-Power Digital PCBs: Reliably Powering Complex Multilayer Digital Printed Circuit Boards," in IEEE Power Electronics Magazine, vol. 8, no. 2, pp. 53-59, June 2021, doi: 10.1109/MPEL.2021.3075757.
Barzdenas, V., &Vasjanov, A. (2022). A Method of Optimizing Characteristic Impedance Compensation Using Cut-Outs in High-Density PCB Designs. Sensors, 22(3), 964.
Bell, J., Redmond, L., Carpenter, K., & de la Croix, J. P. (2022). Experimental dynamic characterization of rigid-flex PCB systems. Experimental Techniques, 1-15.
A. Vardapetyan and C. -J. Ong, "Via Design Optimization for High-Speed Differential Interconnects on Circuit Boards," 2020 IEEE 29th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), San Jose, CA, USA, 2020, pp. 1-3, doi: 10.1109/EPEPS48591.2020.9231314.
Abd, Shamis N., Mohammad Alsajri, and Hind Raad Ibraheem. "Rao-SVM machine learning algorithm for intrusion detection system." Iraqi Journal For Computer Science and Mathematics 1.1 (2020): 23-27.
Salih, Hayder Sabah, Mohanad Ghazi, and Mohammad Aljanabi. "Implementing an Automated Inventory Management System for Small and Medium-sized Enterprises." Iraqi Journal For Computer Science and Mathematics 4.2 (2023): 238-244.
Al-Janabi, Mohammed, and Mohd Arfian Ismail. "Improved intrusion detection algorithm based on TLBO and GA algorithms." Int. Arab J. Inf. Technol. 18.2 (2021): 170-179.
A. K. Sahu, V. K. Chandra and G. R. Sinha, "High level computation technique for characterization of sigma-delta a/d converter," 2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS), Vellore, India, 2017, pp. 1-4, doi: 10.1109/ICMDCS.2017.8211601.
Soma, S., Gowre, S.K.C., Sonth, M.V. et al. Design and simulation of reconfigurable optical logic gates for integrated optical circuits. Opt Quant Electron 55, 340 (2023). https://doi.org/10.1007/s11082-022-04532-8
Sonth, M.V., Gowre, S., Biradar, N., Gadgay, B. (2020). Design and Simulation of AND-OR-INVERT Logic for Photonic Integrated Circuits. In: Mandal, J., Bhattacharya, K., Majumdar, I., Mandal, S. (eds) Information, Photonics and Communication. Lecture Notes in Networks and Systems, vol 79. Springer, Singapore. https://doi.org/10.1007/978-981-32-9453-0_6
Downloads
Published
How to Cite
Issue
Section
License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
All papers should be submitted electronically. All submitted manuscripts must be original work that is not under submission at another journal or under consideration for publication in another form, such as a monograph or chapter of a book. Authors of submitted papers are obligated not to submit their paper for publication elsewhere until an editorial decision is rendered on their submission. Further, authors of accepted papers are prohibited from publishing the results in other publications that appear before the paper is published in the Journal unless they receive approval for doing so from the Editor-In-Chief.
IJISAE open access articles are licensed under a Creative Commons Attribution-ShareAlike 4.0 International License. This license lets the audience to give appropriate credit, provide a link to the license, and indicate if changes were made and if they remix, transform, or build upon the material, they must distribute contributions under the same license as the original.
