Implementation of FinFET based 14T SRAM Memory Cell using Modified Lector Technique & Dual Threshold
Keywords:
CMOS, Dual Threshold, FinFET, SRAM.Abstract
Static Random Access Memory (SRAM) can't become any smaller because to the sorts of materials and leakage testing used in today's large-scale silicon MOSFETs. This study uses a double edge and modified LECTOR method to create new tradeoffs in 14-semiconductor SRAM cells. Because of their outstanding transportation capabilities and the possibility for usage on large-scale processing and production, FinFETs are great replacements replacing outdated CMOS electronics. This test especially investigates a double edge value-based SRAM cell design. There are 14 semiconductor materials used in the design. According to the simulation's findings, FinFET-based circuits are more energy-efficient and reliable than scaled circuits. They are more susceptible to variances and flaws nevertheless. These findings suggest that in terms of power efficiency, FinFETs are far superior to CMOS.
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