Fault-Tolerant Dual-Core Lockstep Architecture for Automotive Zonal Controllers Using NXP S32G Processors
Keywords:
Lockstep execution, ISO 26262, Functional Safety, FlexStep, Dustin cluster, Fault tolerance, Ultra-low power systems, Event-based SLAM, Real-time responsiveness, Arm Cortex-M7, Autonomous VehiclesAbstract
The paper examines the feasibility and security performance of hardware-software co-engineering in the electric
and automated vehicle (EAV) system in regards to the adoption of ISO 26262 ASIL-D requirements. Based on secondary
sources referring to recent publications by IEEE, the study mentions such architectures as FlexStep and Dustin clusters that
evidence ultra-low power consumption (36mW/core), quick interrupt rate (0.3us) and high fault coverage (>99%). Lockstep
execution factors, mixed error analysis systems, as well as event-driven SLAM mechanisms, are a combination of solutions
that promote real-time reactivity and resilience. The results state that the combination of dual-core lockstep processors, bit precision flexibility, and parallel architecture reinforces computational capability and functional safety. This corroborates theuse of these designs in the deployment of next-generation safer EAV in dynamic environments.
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